Design of low-power, low-voltage, differential I/O links for High Energy Physics applications

This work presents the design of a low-power, differential signaling, input/output data link in a 65 nm CMOS process for high energy physics (HEP) experiments. The proposed driver, able to operate at 320 Mbps or 640 Mbps with a normalized power dissipation of 3.125 mW/Gbps, is meant to drive short distance (between 2 and 10 cm) transmission lines located to the module hybrid circuit. A de-emphasis technique has been adopted to reduce the impedance mismatch effects between the driver output and the transmission line. This paper will discuss in detail the solutions implemented in the design and will describe the simulation results.