First test results of the CHIPIX65 asynchronous front-end connected to a 3D sensor

This work reports on the main results from the experimental characterization of the asynchronous analog front-end integrated in a 65 nm CMOS mixed-signal chip for the readout of high granularity silicon pixel sensors at the high-luminosity upgrades of the ATLAS and CMS experiments. Such a mixed-signal chip has been designed and submitted in the framework of the CHIPIX65 project, funded by the Italian Institute of Nuclear Physics for the development of an advanced pixel chip in a 65 nm CMOS technology. The project fits the program of the RD53 Collaboration, whose efforts led to the submission, in August 2017, of the large scale chip RD53A, integrating, among three different front-ends, an improved version of the analog processor discussed in this work. The main performance parameters of the asynchronous analog front-end, bump-bonded to a 3D sensor developed by FBK, are discussed in this work.