28 nm CMOS analog front-end channels for future pixel detectors

This work discusses the design, carried out in the framework of the INFN Falaphel project, of analog front-end circuits for future, high-rate pixel detector applications. In particular, two front-end architectures are being developed, one with Time-over-Threshold (ToT) digitization of the input signal and the other based on an in-pixel flash ADC featuring a novel, clocked comparator conceived to dramatically reduce the threshold dispersion of the front-end. The paper includes a description of the analog processors being developed. The main analog performance parameters, as obtained from circuit simulations and including equivalent noise charge and threshold dispersion, are reported.